High speed serial links have many advantages in electronic systems but problems arise with these advantages. Some of the benefits high speed serial links provide to electronic systems may be decreasing their size, lowering cost, and enhancing performance by limiting the number of wires needed. High serial link speeds also may be beneficial. Serial link speed may be increased by encoding more bits or by running the serial link at a faster symbol rate. Running serial links at a faster symbol rate is the simplest approach for increasing speeds of serial links, however, this approach is complicated by the low pass filtering inherent to wires and semiconductors at high frequencies. Low pass filtering in wires along with noise, distortion, and loss may cause the digital signal to produce errors in its binary output by distorting the signal waveform. Over short distances and low bit rates, few errors are likely to occur, but the signal integrity of waveforms tends to decrease over longer distances and at higher bit rates.
There are solutions for correcting degraded signals in high speed serial links. To correct for degradations, serial link recovery systems or serial interfaces may include a line receiver followed by sampling circuits that convert an analog signal to a digital signal. In differential interfaces, the line receiver is differential and the sampling circuits are usually a DCVS (differential cascode voltage switch) sense latch or a CML (current mode logic) topology. To use these technologies for high speed serial interfaces, one or more DACs (digital to analog converters) may be coupled to these circuits to compensate for device mismatches and to cancel out threshold offsets in the data path.